Software - Edge AI and Vision Alliance https://www.edge-ai-vision.com/category/technologies/software/ Designing machines that perceive and understand. Wed, 18 Feb 2026 21:29:00 +0000 en-US hourly 1 https://wordpress.org/?v=6.9.1 https://www.edge-ai-vision.com/wp-content/uploads/2019/12/cropped-logo_colourplus-32x32.png Software - Edge AI and Vision Alliance https://www.edge-ai-vision.com/category/technologies/software/ 32 32 Ambarella to Showcase “The Ambarella Edge: From Agentic to Physical AI” at Embedded World 2026 https://www.edge-ai-vision.com/2026/02/ambarella-to-showcase-the-ambarella-edge-from-agentic-to-physical-ai-at-embedded-world-2026/ Wed, 18 Feb 2026 21:29:00 +0000 https://www.edge-ai-vision.com/?p=56852 Enabling developers to build, integrate, and deploy edge AI solutions at scale SANTA CLARA, Calif., — Ambarella, Inc. (NASDAQ: AMBA), an edge AI semiconductor company, today announced that it will exhibit at Embedded World 2026, taking place March 10-12 in Nuremberg, Germany. At the show, Ambarella’s theme, “The Ambarella Edge: From Agentic to Physical AI,” […]

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Enabling developers to build, integrate, and deploy edge AI solutions at scale

SANTA CLARA, Calif., — Ambarella, Inc. (NASDAQ: AMBA), an edge AI semiconductor company, today announced that it will exhibit at Embedded World 2026, taking place March 10-12 in Nuremberg, Germany. At the show, Ambarella’s theme, “The Ambarella Edge: From Agentic to Physical AI,” will anchor live demonstrations that highlight how Ambarella’s AI SoCs, software stack, and developer tools deliver a competitive advantage across a wide range of AI applications—from agentic automation and orchestration to physical AI systems deployed in real-world environments.

Ambarella’s exhibit will showcase a scalable AI SoC portfolio providing high AI performance per watt, complemented by a software platform that supports rapid development across diverse edge AI workloads, consistent performance characteristics, and efficient deployment at the edge. Live demos will feature differentiation at the stack-level, partner solutions, and developer workflows across robotics, industrial automation, automotive, edge infrastructure, security, and AIoT use cases.

“Developers are increasingly building AI applications that must operate under strict power, latency, and reliability constraints, while still delivering high levels of performance,” said Muneyb Minhazuddin, Customer Growth Officer at Ambarella. “Here, we are showing how Ambarella’s ecosystem—bringing together performance-efficient AI SoCs with a robust software stack, sample workflows, and engineering resources—accelerates the development of edge AI solutions for a wide range of vertical industry segments.”

Ambarella will also present its Developer Zone (DevZone), giving developers, partners, independent software vendors (ISVs), module builders, and system integrators hands-on access to software tools, optimized models, and agentic blueprints. Together, these elements make it easier for teams to integrate more efficiently and deploy at scale using Ambarella’s technology.

Ambarella’s exhibit will be located in Hall 5, Booth 5-355 at Embedded World 2026. To schedule a guided tour, please contact your Ambarella representative.

About Ambarella
Ambarella’s products are used in a wide variety of edge AI and human vision applications, including video security, advanced driver assistance systems (ADAS), electronic mirrors, telematics, driver/cabin monitoring, autonomous driving, edge infrastructure, drones and other robotics applications. Ambarella’s low-power systems-on-chip (SoCs) offer high-resolution video compression, advanced image and radar processing, and powerful deep neural network processing to enable intelligent perception, sensor fusion and planning. For more information, please visit
www.ambarella.com.

Ambarella Contacts

  • Media contact: Molly McCarthy, mmccarthy@ambarella.com, +1 408-400-1466
  • Investor contact: Louis Gerhardy, lgerhardy@ambarella.com, +1 408-636-2310
  • Sales contact: https://www.ambarella.com/contact-us/

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Production-Ready, Full-Stack Edge AI Solutions Turn Microchip’s MCUs and MPUs Into Catalysts for Intelligent Real-Time Decision-Making https://www.edge-ai-vision.com/2026/02/production-ready-full-stack-edge-ai-solutions-turn-microchips-mcus-and-mpus-into-catalysts-for-intelligent-real-time-decision-making/ Tue, 10 Feb 2026 20:15:25 +0000 https://www.edge-ai-vision.com/?p=56811 Chandler, Ariz., February 10, 2026 — A major next step for artificial intelligence (AI) and machine learning (ML) innovation is moving ML models from the cloud to the edge for real-time inferencing and decision-making applications in today’s industrial, automotive, data center and consumer Internet of Things (IoT) networks. Microchip Technology (Nasdaq: MCHP) has extended its edge AI offering […]

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Chandler, Ariz., February 10, 2026 — A major next step for artificial intelligence (AI) and machine learning (ML) innovation is moving ML models from the cloud to the edge for real-time inferencing and decision-making applications in today’s industrial, automotive, data center and consumer Internet of Things (IoT) networks. Microchip Technology (Nasdaq: MCHP) has extended its edge AI offering with full-stack solutions that streamline development of production-ready applications using its microcontrollers (MCUs) and microprocessors (MPUs) – the devices that are located closest to the many sensors at the edge that gather sensor data, control motors, trigger alarms and actuators, and more.

Microchip’s products are long-time embedded-design workhorses, and the new solutions turn its MCUs and MPUs into complete platforms for bringing secure, efficient and scalable intelligence to the edge. The company has rapidly built and expanded its growing, full-stack portfolio of silicon, software and tools that solve edge AI performance, power consumption and security challenges while simplifying implementation.

“AI at the edge is no longer experimental—it’s expected, because of its many advantages over cloud implementations,” said Mark Reiten, corporate vice president of Microchip’s Edge AI business unit. “We created our Edge AI business unit to combine our MCUs, MPUs and FPGAs with optimized ML models plus model acceleration and robust development tools. Now, the addition of the first in our planned family of application solutions accelerates the design of secure and efficient intelligent systems that are ready to deploy in demanding markets.”

Microchip’s new full-stack application solutions for its MCUs and MPUs encompass pre-trained and deployable models as well as application code that can be modified, enhanced and applied to different environments. This can be done either through Microchip’s embedded software and ML development tools or those from Microchip partners. The new solutions include:

  • Detection and classification of dangerous electrical arc faults using AI-based signal analysis
  • Condition monitoring and equipment health assessment for predictive maintenance
  • Facial recognition with liveness detection supporting secure, on-device identity verification
  • Keyword spotting for consumer, industrial and automotive command-and-control interfaces

Development Tools for AI at the Edge
Engineers can leverage familiar Microchip development platforms to rapidly prototype and deploy AI models, reducing complexity and accelerating design cycles. The company’s MPLAB? X Integrated Development Environment (IDE) with its MPLAB Harmony software framework and MPLAB ML Development Suite plug-in provides a unified and scalable approach for supporting embedded AI model integration through optimized libraries. Developers can, for example, start with simple proof-of-concept tasks on 8-bit MCUs and move them to production-ready high-performance applications on Microchip’s 16- or 32-bit MCUs.

For its FPGAs, Microchip’s VectorBlox™ Accelerator SDK 2.0 AI/ML inference platform accelerates vision, Human-Machine Interface (HMI), sensor analytics and other computationally intensive workloads at the edge while also enabling training, simulation and model optimization within a consistent workflow.

Other support includes training and enablement tools like the company’s motor control reference design featuring its dsPIC? DSCs for data extraction in a real-time edge AI data pipeline, and others for load disaggregation in smart e-metering, object detection and counting, and motion surveillance. Microchip also helps solve edge AI challenges through complementary components that are required for product design and development. These include PCIe? devices that connect embedded compute at the edge and high-density power modules that enable edge AI in industrial automation and data center applications.

The analyst firm IoT Analytics stated in its October 2025 market report that embedding edge AI capabilities directly into MCUs is among the top four industry trends, enabling AI-driven applications “…that reduce latency, enhance data privacy, and lower dependency on cloud infrastructure.” Microchip’s AI initiative reinforces this trend with its MCU and MPU platform, as well as its FPGAs. Edge AI ecosystems increasingly require support for both software AI accelerators and integrated hardware acceleration on multiple devices across a range of memory configurations.

Availability
Microchip is actively working with customers of its full-stack application solutions, providing a variety of model training and other workflow support. The company is also working with multiple partners whose software provides developers with additional deployment-ready options. To learn more about Microchip’s edge AI offering and new full-stack solutions, visit www.microchip.com/EdgeAI. Additional information on each solution can be found at Microchip’s on-demand Edge AI Webinar Series, starting February 17.

About Microchip
Microchip Technology Inc. is a broadline supplier of semiconductors committed to making innovative design easier through total system solutions that address critical challenges at the intersection of emerging technologies and durable end markets. Its easy-to-use development tools and comprehensive product portfolio support customers throughout the design process, from concept to completion. Headquartered in Chandler, Arizona, Microchip offers outstanding technical support and delivers solutions across the industrial, automotive, consumer, aerospace and defense, communications and computing markets. For more information, visit the Microchip website at www.microchip.com.

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Accelerating next-generation automotive designs with the TDA5 Virtualizer™ Development Kit https://www.edge-ai-vision.com/2026/02/accelerating-next-generation-automotive-designs-with-the-tda5-virtualizer-development-kit/ Tue, 10 Feb 2026 09:00:45 +0000 https://www.edge-ai-vision.com/?p=56795 This blog post was originally published at Texas Instruments’ website. It is reprinted here with the permission of Texas Instruments. Introduction Continuous innovation in high-performance, power-efficient systems-on-a-chip (SoCs) is enabling safer, smarter and more autonomous driving experiences in even more vehicles. As another big step forward, Texas Instruments and Synopsys developed a Virtualizer Development Kit™ (VDK) for the […]

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This blog post was originally published at Texas Instruments’ website. It is reprinted here with the permission of Texas Instruments.

Introduction

Continuous innovation in high-performance, power-efficient systems-on-a-chip (SoCs) is enabling safer, smarter and more autonomous driving experiences in even more vehicles.

As another big step forward, Texas Instruments and Synopsys developed a Virtualizer Development Kit™ (VDK) for the TDA5 high-performance compute SoC family, which includes the TDA54-Q1. The TDA5 VDK enables developers to evaluate, develop and test devices in the TDA5 family ahead of initial silicon samples, providing a seamless development cycle with one software development kit (SDK) for both physical and virtual SoCs. Each device in the TDA5 family have a corresponding VDK to enable a common virtualization design and consistent user experience.

Along with the VDK, TI and Synopsys are providing additional components to create the full virtual development environment. Figure 1 provides an overview of available resources, which include:

  • The virtual prototype, which is the simulated model of a TDA5 SoC.
  • Deployment services from Synopsys, which are add-ons and interfaces that enable developers to integrate the VDK with other virtual components or tools.
  • Documentation for the TDA5 and the TDA54-Q1 software development kit.
  • Reference software examples for each TDA5 VDK and SDK to help developers get started.

Figure 1 Block diagram showing components provided by TI and Synopsys to get started with development on the VDK.

Why virtualization matters

Virtualization designs greatly reduce automotive development cycles by enabling software development without physical hardware. This allows developers to accelerate or “shift-left” development by starting software earlier and then migrating to physical hardware once available (as shown in Figure 2). Additionally, earlier software development extends to ecosystem partners, enabling key third-party software components to be available earlier.

Figure 2 Visualization of how software can be migrated from VDK to SoC.

Accelerating development with virtualization

The TDA5 VDK helps software developers work more effectively and efficiently, allowing them to use software-in-the-loop testing, so they can test and validate virtually without needing costly on-the-road testing.

Developers can use the TDA5 VDK to enhance debugging capabilities with deeper insights into internal device operations than what is typically exposed through the physical SoC pins. The TDA5 VDK also provides fault injection capabilities, enabling developers to simulate failures inside the device to get better information on how the software behaves when something goes wrong.

Scalability of virtualization

Scalability is another key benefit of the TDA5 VDK because virtualization platforms don’t require shipping, allowing development teams to ramp faster and be more responsive with resource allocation for ongoing projects. The TDA5 VDK also enables automated test environments, since development teams can replace traditional “board farms” with virtual environments running on remote computers. This helps automakers streamline continuous integration, continuous deployment (CICD) workflows to more efficiently and effectively accomplishing testing.

Since the TDA5 VDK is also available for future TDA5 SoCs, developers can scale work across multiple projects. If a developer is using the VDK for a specific TDA5 device (for example, TDA54), they can explore other products in the TDA5 family in a virtual environment without needing to change hardware configurations.

System integration

Virtualization designs such as the TDA5 VDK serve as the foundation for developers to build complete digital twins for their designs. By virtualizing the SoC, it can be integrated with other virtual components and tools to create larger simulated systems such as full ECU networks. Figure 3 shows how developers can leverage the capabilities of the Synopsys platform to integrate the VDK with other virtual components and simulate complete designs.


Figure 3 Diagram showing how the VDK can integrate with other virtual components and simulate complete designs.

 

Digital environment simulation tools can also be integrated with the TDA5 VDK to enable virtual testing in simulated driving scenarios, allowing developers to quickly perform reproducible testing. The TDA5 VDK also allows developers to leverage the broad ecosystem of tools and partners from Synopsys to get the most of their virtual development experience.

Getting started with the TDA54 VDK

The TDA54 SDK is now available on TI.com to help engineers get started with the TDA54 virtual development kit. Samples of the TDA54-Q1 SoC, the first device in the TDA5 family, will be sampling to select automotive customers by the end of 2026. Contact TI for more information about the TDA5 VDK and how to get started.

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Into the Omniverse: OpenUSD and NVIDIA Halos Accelerate Safety for Robotaxis, Physical AI Systems https://www.edge-ai-vision.com/2026/02/into-the-omniverse-openusd-and-nvidia-halos-accelerate-safety-for-robotaxis-physical-ai-systems/ Mon, 09 Feb 2026 09:00:59 +0000 https://www.edge-ai-vision.com/?p=56608 This blog post was originally published at NVIDIA’s website. It is reprinted here with the permission of NVIDIA. NVIDIA Editor’s note: This post is part of Into the Omniverse, a series focused on how developers, 3D practitioners and enterprises can transform their workflows using the latest advancements in OpenUSD and NVIDIA Omniverse. New NVIDIA safety […]

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This blog post was originally published at NVIDIA’s website. It is reprinted here with the permission of NVIDIA.

NVIDIA Editor’s note: This post is part of Into the Omniverse, a series focused on how developers, 3D practitioners and enterprises can transform their workflows using the latest advancements in OpenUSD and NVIDIA Omniverse.

New NVIDIA safety frameworks and technologies are advancing how developers build safe physical AI.

Physical AI is moving from research labs into the real world, powering intelligent robots and autonomous vehicles (AVs) — such as robotaxis — that must reliably sense, reason and act amid unpredictable conditions.

To safely scale these systems, developers need workflows that connect real-world data, high-fidelity simulation and robust AI models atop the common foundation provided by the OpenUSD framework.

The recently published OpenUSD Core Specification 1.0, OpenUSD — aka Universal Scene Description — now defines standard data types, file formats and composition behaviors, giving developers predictable, interoperable USD pipelines as they scale autonomous systems.

Powered by OpenUSD, NVIDIA Omniverse libraries combine NVIDIA RTX rendering, physics simulation and efficient runtimes to create digital twins and simulation-ready (SimReady) assets that accurately reflect real-world environments for synthetic data generation and testing.

NVIDIA Cosmos world foundation models can run on top of these simulations to amplify data variation, generating new weather, lighting and terrain conditions from the same scenes so teams can safely cover rare and challenging edge cases.

 

In addition, advancements in synthetic data generation, multimodal datasets and SimReady workflows are now converging with the NVIDIA Halos framework for AV safety, creating a standards-based path to safer, faster, more cost-effective deployment of next-generation autonomous machines.

Building the Foundation for Safe Physical AI

Open Standards and SimReady Assets

The OpenUSD Core Specification 1.0 establishes the standard data models and behaviors that underpin SimReady assets, enabling developers to build interoperable simulation pipelines for AI factories and robotics on OpenUSD.

Built on this foundation, SimReady 3D assets can be reused across tools and teams and loaded directly into NVIDIA Isaac Sim, where USDPhysics colliders, rigid body dynamics and composition-arc–based variants let teams test robots in virtual facilities that closely mirror real operations.

Open-Source Learning 

The Learn OpenUSD curriculum is now open source and available on GitHub, enabling contributors to localize and adapt templates, exercises and content for different audiences, languages and use cases. This gives educators a ready-made foundation to onboard new teams into OpenUSD-centric simulation workflows.​

Generative Worlds as Safety Multiplier

Gaussian splatting — a technique that uses editable 3D elements to render environments quickly and with high fidelity — and world models are accelerating simulation pipelines for safe robotics testing and validation.

At SIGGRAPH Asia, the NVIDIA Research team introduced Play4D, a streaming pipeline that enables 4D Gaussian splatting to accurately render dynamic scenes and improve realism.

Spatial intelligence company World Labs is using its Marble generative world model with NVIDIA Isaac Sim and Omniverse NuRec so researchers can turn text prompts and sample images into photorealistic, Gaussian-based physics-ready 3D environments in hours instead of weeks.

Those worlds can then be used for physical AI training, testing and sim-to-real transfer. This high-fidelity simulation workflow expands the range of scenarios robots can practice in while keeping experimentation safely in simulation.

Lightwheel Helps Teams Scale Robot Training With SimReady Assets

Powered by OpenUSD, Lightwheel’s SimReady asset library includes a common scene description layer, making it easy to assemble high-fidelity digital twins for robots. The SimReady assets are embedded with precise geometry, materials and validated physical properties, which can be loaded directly into NVIDIA Isaac Sim and Isaac Lab for robot training. This allows robots to experience realistic contacts, dynamics and sensor feedback as they learn.

End-to-End Autonomous Vehicle Safety

End-to-end autonomous vehicle safety advancements are accelerating with new research, open frameworks and inspection services that make validation more rigorous and scalable.

NVIDIA researchers, with collaborators at Harvard University and Stanford University, recently introduced the Sim2Val framework to statistically combine real-world and simulated test results, reducing AV developers’ need for costly physical mileage while demonstrating how robotaxis and AVs can behave safely across rare and safety-critical scenarios.

Learn more by watching NVIDIA’s “Safety in the Loop” livestream:

 

These innovations are complemented by a new, open-source NVIDIA Omniverse NuRec Fixer, a Cosmos-based model trained on AV data that removes artifacts in neural reconstructions to produce higher-quality SimReady assets.

To align these advances with rigorous global standards, the NVIDIA Halos AI Systems Inspection Lab — accredited by ANAB — provides impartial inspection and certification of Halos elements across robotaxi fleets, AV stacks, sensors and manufacturer platforms through the Halos Certification Program.

AV Ecosystem Leaders Putting Physical AI Safety to Work

BoschNuro and Wayve are among the first participants in the NVIDIA Halos AI Systems Inspection Lab, which aims to accelerate the safe, large-scale deployment of robotaxi fleets. Onsemi, which makes sensor systems for AVs, industrial automation and medical applications, has recently become the first company to pass inspection for the NVIDIA Halos AI Systems Inspection Lab.

 

The open-source CARLA simulator integrates NVIDIA NuRec and Cosmos Transfer to generate reconstructed drives and diverse scenario variations, while Voxel51’s FiftyOne engine, linked to Cosmos Dataset Search, NuRec and Cosmos Transfer, helps teams curate, annotate and evaluate multimodal datasets across the AV pipeline.​

 

Mcity at the University of Michigan is enhancing the digital twin of its 32-acre AV test facility using Omniverse libraries and technologies. The team is integrating the NVIDIA Blueprint for AV simulation and Omniverse Sensor RTX application programming interfaces to create physics-based models of camera, lidar, radar and ultrasonic sensors.

By aligning real sensor recordings with high-fidelity simulated data and sharing assets openly, Mcity enables safe, repeatable testing of rare and hazardous driving scenarios before vehicles operate on public roads.

Get Plugged Into the World of OpenUSD and Physical AI Safety

Learn more about OpenUSD, NVIDIA Halos and physical AI safety by exploring these resources:

 

Katie Washabaugh, Product Marketing Manager for Autonomous Vehicle Simulation, NVIDIA

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Driving the Future of Automotive AI: Meet RoX AI Studio https://www.edge-ai-vision.com/2026/02/driving-the-future-of-automotive-ai-meet-rox-ai-studio/ Wed, 04 Feb 2026 09:00:01 +0000 https://www.edge-ai-vision.com/?p=56668 This blog post was originally published at Renesas’ website. It is reprinted here with the permission of Renesas. In today’s automotive industry, onboard AI inference engines drive numerous safety-critical Advanced Driver Assistance Systems (ADAS) features, all of which require consistent, high-performance processing. Given that AI model engineering is inherently iterative (numerous cycles of ‘train, validate, and […]

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This blog post was originally published at Renesas’ website. It is reprinted here with the permission of Renesas.

In today’s automotive industry, onboard AI inference engines drive numerous safety-critical Advanced Driver Assistance Systems (ADAS) features, all of which require consistent, high-performance processing. Given that AI model engineering is inherently iterative (numerous cycles of ‘train, validate, and deploy’), it is crucial to assess model performance on actual silicon at every step of product development. This hardware-based validation not only strengthens confidence in model engineering decisions but also ensures that AI solutions are reliable and meet the target KPI for deployment into in-vehicle AI applications through the product lifecycle.

Meet RoX AI Studio, designed specifically for today’s innovative automotive teams. With RoX AI Studio, you can remotely benchmark and evaluate your AI models on Renesas R-Car SoCs within your internet browser (Figure 1), all while leveraging a secure MLOps infrastructure that puts your engineering team in the fast lane toward production-ready solutions.

This platform is a cornerstone of the Renesas Open Access (RoX) Software-Defined Vehicle (SDV) platform, offering an integrated suite of hardware, software, and infrastructure for customers designing state-of-the-art automotive systems powered by AI. We’re dedicated to empowering products with advanced intelligence, high-performance, and an accelerated product lifecycle. RoX AI Studio enables you to unlock the full potential of next-generation vehicles by embracing a shift-left approach.

Transforming Product Engineering with RoX AI Studio

The modern vehicle is evolving into a powerful, intelligent platform, requiring automotive companies to accelerate development, testing, and optimization of AI models that enhance safety, efficiency, and in-vehicle experiences. Are you ready to take your automotive AI development to the next level? Meet RoX AI Studio, our cloud-native MLOps platform that revolutionizes this process by bringing the hardware lab directly to your browser. This virtual lab environment enables teams to concentrate on unlocking innovative capabilities, eliminating delays and expenses often associated with traditional infrastructure setup and maintenance. With RoX AI Studio, you can begin your AI model journey immediately, ensuring that your development process starts on day one.

RoX AI Studio Platform Architecture

Delve into the platform architecture of RoX AI Studio (Figure 2), mapping each component to customer-ready valued solutions.

User Experience (UX) with Web UI and API

The RoX AI Studio Web UI , serves as a web-native graphical user interface that streamlines management and benchmarking/evaluation of AI models on Renesas R-Car SoC hardware.

Web UI

Through this front-end product, users can register new AI models, configure hardware-in-the-loop (HIL) inference experiments, and conduct benchmarking and performance evaluations of their models, all within a browser environment.

API

The API bridges the Web UI with MLOps backend, facilitating robust communication and data exchange. It is designed to ensure high performance and strong security. The API consists of a broad set of endpoints that collectively enable a wide range of functions, including user management, model operations, dataset management, experiment orchestration, and HIL model benchmarking/evaluation. By decoupling the client from backend complexity, the client API enables rapid integration of new features and workflows, supporting continuous improvement and innovation for evolving customer needs.

The streamlined architecture of the RoX AI Studio Web UI and API empowers users to quickly engage with their tasks, leveraging their preferred browser for immediate access (Figure 3). This approach eliminates barriers to entry, enabling each user to start working on model registration, experiment setup, and evaluation instantly, without delays or the need for specialized client software.

UX Overview

MLOps with Workflows and HyCo Toolchain

The API endpoints in RoX AI Studio are underpinned by robust MLOps business logic, which ensures reliable execution for every incoming API request. Each experiment initiated through the platform follows a systematic and predefined sequence of steps. These steps are organized as Directed Acyclic Graphs (DAGs) and orchestrated using Apache Airflow, a proven workflow management tool.

MLOps Overview

Workflows

Apache Airflow manages the queuing, scheduling, and concurrency of experiment tasks automatically, allowing the system to efficiently handle multiple simultaneous user requests with finite computational resources on the cloud. The backend architecture leverages a suite of MLOps and third-party microservices, each deployed as Docker containers or coupled through third-party API. This design separates the execution of individual intermediate steps from the overarching control plane, which is governed by the DAG workflows. Such separation provides greater flexibility, enabling the platform to scale dynamically across distributed cloud computing environments and adapt to fluctuating user demands.

Moreover, this approach promotes more granular product development for each microservice. By supporting out-of-the-box (OOB) execution for individual components, RoX AI Studio enables rapid iteration and targeted enhancements, aligning with evolving platform requirements and user needs. Each workflow incorporates model management, data management, and experiment management, powered by Model Registry, Managed DB, and Board Manager.

HyCo Toolchain

Custom layers and operators are increasingly prevalent as AI model architecture continues to evolve. To address this opportunity, a high-performance custom compiler known as HyCo (Hybrid Compiler) is offered specifically for the R-Car Gen4 product line. HyCo has a hybrid compiler architecture, comprising both front-end and back-end compiler components, to ensure scalability and adaptability for custom implementations. At the core of this approach, TVM functions as a unifying backbone, enabling seamless integration of customizations in the front-end compiler with accelerator-specific back-end compilers. This design supports efficient compilation and optimization tailored to heterogeneous hardware accelerators within the SoC.

HyCo is seamlessly integrated into a developer-oriented HyCo toolchain, also referred to as AI Toolchain. Beyond the compiler itself, AI Toolchain provides interfaces for ingesting open-source model zoo assets as well as BYOM assets, encompassing both pre-processing and post-processing software components. This approach demonstrates how an AI toolchain can integrate with customer-specific model zoos, enhancing flexibility in deploying diverse AI workloads. Within the MLOps framework, various configurations of the AI toolchain are containerized into independent microservices. This modular approach emphasizes robust integration within MLOps workflows, allowing for the deployment of standalone AI toolchain components that can dynamically scale in cloud environments.

Infrastructure with MLOps Cloud and Device Farm

The hybrid infrastructure enables comprehensive end-to-end MLOps workflows, seamlessly delegating HIL inference tasks to Renesas Device Farm. Currently, the MLOps cloud platform is hosted on Azure, but its architecture is designed to support flexible deployment across other public or private cloud environments in the future.

Infrastructure Overview

MLOps Cloud

By utilizing a workflow-based MLOps architecture, we can securely enable multiple users within a single tenant to share computational resources, optimizing capital expenditure. This approach empowers customers to develop AI products without the need for significant individual investment for each developer. The architecture is also built to support seamless integration with private customer clouds, accommodating custom hardware configurations (such as CPU and GPU servers and shared bulk storage) alongside robust on-premises security infrastructure.

Renesas Device Farm

A secure on-premises device farm hosts multiple R-Car SoC development boards, providing the foundation for hardware-in-the-loop (HIL) inference experiments essential for AI model benchmarking and evaluation. The cloud-based Board Manager microservice efficiently handles board allocation, setup, and release, streamlining resource management and eliminating the need for direct developer involvement. The MLOps workflow leverages the device farm to execute HIL inference experiments without common delays associated with traditional board provisioning, updating, and maintenance. A robust networking architecture ensures secure HIL inference sessions for users, maintaining the integrity and confidentiality of both data and AI models.

What Advantages does RoX AI Studio bring to the customers?

  • Faster Time-to-Market: Shift-left your AI product lifecycle. Start model evaluation and iteration early, long before our silicon gets delivered to your labs!
  • Managed, Scalable Infrastructure: Forget about maintaining costly labs. RoX AI Studio delivers scale, security, redundancy, and automation out of the box.
  • Effortless Experimentation: Register your own models (BYOM), spin up inference experiments, and compare results easily—all through a simple dashboard.
  • Collaborate with Confidence: Centralized, cloud-based access lets distributed global teams work together seamlessly on model benchmarking and evaluations.

Imagine a world where your AI engineers are instantly productive, your teams collaborate without boundaries, and your prototypes move from idea to reality faster than ever before. With RoX AI Studio, that world is already here!

Sign up for a hands-on demo of RoX AI Studio on your journey to intelligent, efficient, and safe software-defined vehicles.

Shashank Bangalore Lakshman
SoC MLOps Engineering Manager

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Production Software Meets Production Hardware: Jetson Provisioning Now Available with Avocado OS https://www.edge-ai-vision.com/2026/02/production-software-meets-production-hardware-jetson-provisioning-now-available-with-avocado-os/ Mon, 02 Feb 2026 09:00:53 +0000 https://www.edge-ai-vision.com/?p=56738 This blog post was originally published at Peridio’s website. It is reprinted here with the permission of Peridio. The gap between robotics prototypes and production deployments has always been an infrastructure problem disguised as a hardware problem. Teams build incredible computer vision models and robotic control systems on NVIDIA Jetson developer kits, only to hit […]

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This blog post was originally published at Peridio’s website. It is reprinted here with the permission of Peridio.

The gap between robotics prototypes and production deployments has always been an infrastructure problem disguised as a hardware problem. Teams build incredible computer vision models and robotic control systems on NVIDIA Jetson developer kits, only to hit a wall when scaling to production fleets. The bottleneck isn’t the AI or the algorithms—it’s the months spent building custom Linux systems, provisioning infrastructure, and OTA mechanisms that should have been solved problems.

Today, we’re announcing native provisioning support for NVIDIA Jetson Orin Nano, Orin NX and AGX Orin in Avocado OS. This completes our production software stack for the industry’s leading AI edge hardware, delivering deterministic Linux, secure OTA updates, and fleet management from day one.

What We’ve Learned About Production Jetson Deployments

Through partnerships with companies like RoboFlow and SoloTech, and conversations with teams building everything from autonomous mobile robots to industrial smart cameras, a clear pattern emerged. The technical challenges weren’t about AI models or robotic control algorithms—teams had those figured out. The bottleneck was infrastructure.

Teams consistently hit the same obstacles:

  • Custom Yocto BSP builds consuming 3-6 months of engineering time
  • RTC configuration issues causing timestamp failures in vision pipelines
  • Fragile update mechanisms that break when scaling beyond dozens of devices
  • Manual provisioning workflows that don’t translate to manufacturing partnerships
  • Security compliance requirements eating bandwidth from core product development

These aren’t edge cases. This is the standard experience of taking Jetson from prototype to production. And it’s exactly backward—teams solving hard problems in robotics and computer vision shouldn’t be rebuilding the same embedded Linux infrastructure.

Premium Hardware Deserves Production-Ready Software

NVIDIA Jetson Orin Nano delivers 67 TOPS of AI performance with exceptional power efficiency. It’s the computational foundation for modern edge AI—supporting everything from multi-camera vision systems to real-time SLAM processing to local LLM inference. The hardware is production-ready.

The software needs to match.

What “production-grade” actually means:

Stable Base OS: Deterministic Linux that supports robust solutions. Not Ubuntu images that drift with package updates. Reproducible, image-based systems where every device runs identical, validated software.

Full NVIDIA Tool Suite: CUDA, TensorRT, OpenCV—pre-integrated and production-tested. Not reference implementations that require months of BSP work. The complete NVIDIA stack, ready to support inference solutions from partners like RoboFlow and SoloTech.

Day One Provisioning: Factory-ready deployment without custom scripts and USB ceremonies. Cryptographically verified images, hardware-backed credentials, and deterministic flashing workflows that integrate with manufacturing partners.

Fleet-Scale Operations: Atomic OTA updates with automatic rollback. Phased releases with cohort targeting. Air-gapped update delivery for secure environments. Infrastructure that works reliably across thousands of devices.

This is what we mean by production-ready hardware meeting production-grade software. Jetson provides the computational horsepower. Avocado OS and Peridio Core provide the operational infrastructure to actually ship products.

Complete Stack: From Build to Fleet

With Jetson provisioning now available, teams get the complete deployment pipeline:

Build Phase

  • Pre-integrated NVIDIA BSPs with validated hardware support
  • Modular system composition using declarative configuration
  • Reproducible builds with cryptographic verification
  • CUDA, TensorRT, ROS2, OpenCV—all validated and integrated

Provisioning Phase

  • Native Jetson flashing via tegraflash profile
  • Automated partition layout and bootloader configuration
  • Factory credential injection for fleet registration
  • Deterministic provisioning from Linux host environments

Deployment Phase

  • Atomic, image-based OTA updates with automatic rollback
  • Phased releases with cohort targeting
  • SBOM generation and CVE tracking
  • Air-gapped update delivery for secure environments

Fleet Operations

  • Centralized device management via Peridio Console
  • Real-time telemetry and health monitoring
  • Remote access for debugging and diagnostics
  • 10+ year support lifecycle matching industrial hardware

This isn’t a reference design or example code. It’s production infrastructure that scales from 10 devices to 10,000 and beyond.

Why This Matters: Robotics is Moving Faster Than Expected

The robotics industry is accelerating at an unprecedented pace. The foundational layer—perception—is rapidly maturing, unlocking capabilities that seemed years away just months ago. Vision language models (VLMs) and vision-language-action models (VLAs) are fundamentally changing how robots understand and interact with their environments. Engineers who once relied entirely on deterministic control systems are now integrating fine-tuned AI models that can handle ambiguity and adapt to novel situations. The innovation happening right now suggests 2026 will be a breakout year for practical robotics deployment.

Last week at Circuit Launch’s Robotics Week in the Valley, we saw this firsthand. Teams that aren’t roboticists or computer vision experts were training models with RoboFlow, integrating VLA platforms like SoloTech, and building working demonstrations in hours—not weeks.

The AI tooling has advanced exponentially. Inference frameworks are mature. Hardware platforms like Jetson deliver exceptional performance. But embedded Linux infrastructure has been the persistent bottleneck preventing teams from shipping at the pace they’re prototyping.

This matters because:

When prototyping velocity increases 10x, production infrastructure can’t remain a 6-month investment. Teams building breakthrough applications need to move from working demo to deployed fleet at the same pace they move from idea to working demo.

The companies winning in robotics will be the ones focused on their core innovation—better vision algorithms, more sophisticated manipulation, smarter navigation. Not the ones rebuilding Yocto layers and debugging RTC drivers.

Technical Foundation: Why Provisioning is Hard

The challenge with Jetson provisioning isn’t technical complexity—it’s reproducibility at scale. Most teams start by configuring their development board manually: installing packages, setting up environments, tweaking configurations until everything works. Then they try to capture those steps in scripts to replicate the setup on the next device.

This manual-to-scripted approach falls apart quickly. What runs perfectly on your desk becomes unpredictable in production. By the time you’re managing even a handful of devices, you’re troubleshooting subtle environment differences, dealing with drift from package updates, and questioning whether any two devices are truly running the same stack.

Production provisioning solves this fundamentally differently. Instead of scripting manual steps, you’re building reproducible system images where every device boots into an identical, validated environment. The OS becomes a clean foundation—deterministic, verifiable, and ready to run whatever AI toolchain your application requires. No configuration drift. No “it works on my machine” surprises.

This is where Avocado OS and NVIDIA’s tegraflash tooling come together. We’ve integrated deeply with NVIDIA’s BSP to automate the entire provisioning workflow—partition layouts, bootloader configuration, cryptographic verification, hardware initialization sequences. The complexity is still there, but it’s handled systematically rather than cobbled together through scripts.

We document the Linux host requirement explicitly because it matters. Provisioning workflows require reliable hardware enumeration and direct device access. macOS and Windows introduce VM-in-VM architectures that create timing issues and device passthrough complexity. Native Linux (Ubuntu 22.04+, Fedora 39+) ensures consistent, reliable provisioning.

For production deployments, this integrates with manufacturing partners. AdvantechSeeed Studio, and ecosystem partners can run provisioning at end-of-line, delivering pre-configured devices directly to deployment sites. Zero-touch deployment at scale.

Scale Across the Jetson Family

Teams can scale up and down within the Jetson family with unified toolchains and processes across the Jetson family:

  • NVIDIA Jetson Orin Nano: 67 TOPS, efficient edge AI for vision and robotics
  • NVIDIA Jetson Orin NX: Up to 157 TOPS for balanced performance for production deployments
  • NVIDIA Jetson AGX Orin: Up to 275 TOPS for demanding AI workloads
  • NVIDIA Jetson Thor (coming soon): Next-generation automotive and robotics platform

One development workflow. Consistent provisioning. Predictable behavior across the product line. This matters when your prototype needs to scale, or when different deployment scenarios require different performance tiers.

Getting Started: Production-Ready in Minutes

For teams ready to move from prototype to production, our provisioning guide walks through the complete workflow—from initializing your project to flashing your first device.

The entire process, from clean hardware to production-ready deployment, takes minutes, not months. The guide covers everything you need: Linux host setup, project initialization, building production images, and first boot configuration.

What’s Next: NVIDIA Momentum

Provisioning is the foundation. What comes next is ecosystem momentum.

We’re working with partners across the robotics and computer vision stack—from inference platforms like RoboFlow and SoloTech to hardware manufacturers like Advantech. The goal is creating a complete solution ecosystem where teams can focus entirely on their application layer while we handle everything below it.

We should talk if you are:

  • Building on Jetson and struggling with the path to production.
  • Evaluating hardware platforms and need production software from day one.
  • Just getting started and want to avoid months of infrastructure work.

Production Software That Matches Production Hardware

Our thesis has always been that embedded engineers should ship applications, not operating systems. The robotics acceleration we’re seeing validates this more than ever. Teams have breakthrough ideas for autonomous systems, vision AI, and robotic manipulation. They shouldn’t spend months on Linux infrastructure.

Jetson provisioning is production-ready today. It’s the result of deep technical work, extensive partner validation, and clear understanding of what teams actually need when taking hardware to production.

Production-ready hardware. Production-grade software. Available now.

 


Ready to deploy production-ready Jetson? Check out our Jetson solution overview, explore the provisioning guide, or request a demo to discuss your use case.

If you’re working with Jetson and want to connect about production deployment challenges, join our Discord or reach out directly—we’d love to learn about your use case and how we can help.

 

Bill Brock
CEO, Peridio

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Robotics Builders Forum offers Hardware, Know-How and Networking to Developers https://www.edge-ai-vision.com/2026/01/robotics-day-offers-hardware-know-how-and-networking-to-developers/ Thu, 29 Jan 2026 14:00:56 +0000 https://www.edge-ai-vision.com/?p=56654 On February 25, 2026 from 8:30 am to 5:30 pm ET, Advantech, Qualcomm, Arrow, in partnership with D3 Embedded, Edge Impulse, and the Pittsburgh Robotics Network will present Robotics Builders Forum, an in-person conference for engineers and product teams. Qualcomm and D3 Embedded are members of the Edge AI and Vision Alliance, while Edge Impulse […]

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On February 25, 2026 from 8:30 am to 5:30 pm ET, Advantech, Qualcomm, Arrow, in partnership with D3 Embedded, Edge Impulse, and the Pittsburgh Robotics Network will present Robotics Builders Forum, an in-person conference for engineers and product teams. Qualcomm and D3 Embedded are members of the Edge AI and Vision Alliance, while Edge Impulse is a subsidiary of Qualcomm.

Here’s the description, from the event registration page:

Overview

Exclusive in-person event: get practical guidance, platform roadmap & hands-on experience to accelerate compute & AI choices for your robot

Join us for an exclusive, in-person Robotics Day/ Builders Forum built for engineers and product teams developing AMRs, humanoids, and industrial robotics applications. Co-hosted with Arrow, Qualcomm, Edge Impulse and Advantech, and supported by ecosystem partners, the event delivers practical guidance on choosing compute platforms, integrating vision and sensors, and accelerating AI development from prototype to deployment.

What to expect

  • Expert keynotes on robotics platform trends, roadmap considerations, and rugged edge deployment
  • Live demo showcase with real hardware and end-to-end solution workflows you can evaluate firsthand
  • Three technical breakout tracks with deep dives on compute, vision and perception, and AI software optimization
  • High-value networking with peer robotics builders, plus direct access to industry leaders, solution architects, and partner technical teams

You’ll leave with clearer platform direction, implementation best practices, and trusted connections for follow-up technical discussions and next-step evaluations. Attendance is limited to keep conversations focused and interactive.

To close the day, we will host a Connections Mixer at the Sky Lounge featuring a brief wrap-up and a raffle. This casual networking hour is designed to help attendees connect with peers, speakers, and solution teams in a relaxed setting. Sponsored by D3 Embedded.
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This event is free and designed for professionals building or evaluating robotics and AMR solutions, including robotics and AMR product managers, system architects and embedded engineers, industrial automation R&D leaders, perception and vision engineers, and operations and engineering directors. We also welcome professionals tracking the latest robotics trends and platform direction.

Invitation-only access

Click Get ticket and complete the Event Registration form to apply for a free ticket. Event hosts will review submissions and email confirmed invitations (with an event code) to qualified attendees. Please present your ticket at reception to receive your full-day conference badge.

Location

Wyndham Grand Pittsburgh Downtown
600 Commonwealth Place
Pittsburgh, PA 15222

Agenda

08:30 AM – 09:00 AM – Breakfast & Connections Kickoff

09:00 AM – 09:15 AM – Opening Remarks & Day Overview 

09:15 AM – 09:45 AM – Keynote 1: Global Robotics Trends and How You Can Take Advantage (sponsored by Arrow) 

09:45 AM – 10:30 AM – Keynote 2: Utilizing Dragonwing for Industrial Arm-Based Robotics Solutions (sponsored by Qualcomm, Edge Impulse)

10:30 AM – 11:00 AM – Keynote 3: Ruggedizing Robotics Solutions for Mobility and Harsh Environments (sponsored by Advantech) 

11:00 AM – Break 

11:15 AM – 11:45 AM – Keynote 4: Selecting the Proper Cameras and Sensors for AI-Assisted Perception (sponsored by D3 Embedded) 

11:45 AM – 12:45 PM – Lunch 

12:45 PM – 03:30 PM – Three Breakout Rotations (45 min each with breaks) 

Track A: Building Out a Full-Scale Humanoid Robot from a Hardware Perspective
Track B: Leveraging Software Solutions to Get the Most Out of Your Processor
Track C: Designing and Integrating Machine Vision Solutions for AMRs and Humanoids

03:30 PM – 05:30 PM – Connections Mixer at Sky Lounge (sponsored by D3 Embedded)

To register for this free webinar, please see the event page.

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On-Device LLMs in 2026: What Changed, What Matters, What’s Next https://www.edge-ai-vision.com/2026/01/on-device-llms-in-2026-what-changed-what-matters-whats-next/ Wed, 28 Jan 2026 14:00:05 +0000 https://www.edge-ai-vision.com/?p=56644 In On-Device LLMs: State of the Union, 2026, Vikas Chandra and Raghuraman Krishnamoorthi explain why running LLMs on phones has moved from novelty to practical engineering, and why the biggest breakthroughs came not from faster chips but from rethinking how models are built, trained, compressed, and deployed. Why run LLMs locally? Four reasons: latency (cloud […]

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In On-Device LLMs: State of the Union, 2026, Vikas Chandra and Raghuraman Krishnamoorthi explain why running LLMs on phones has moved from novelty to practical engineering, and why the biggest breakthroughs came not from faster chips but from rethinking how models are built, trained, compressed, and deployed.

Why run LLMs locally?

Four reasons: latency (cloud round-trips add hundreds of milliseconds, breaking real-time experiences), privacy (data that never leaves the device can’t be breached), cost (shifting inference to user hardware saves serving costs at scale), and availability (local models work without connectivity). The trade-off is clear: frontier reasoning and long conversations still favor the cloud, but daily utility tasks like formatting, light Q&A, and summarization increasingly fit on-device.

Memory bandwidth is the real bottleneck

People over-index on TOPS. Mobile NPUs are powerful, but decode-time inference is memory-bandwidth bound: generating each token requires streaming the full model weights. Mobile devices have 50-90 GB/s bandwidth; data center GPUs have 2-3 TB/s. That 30-50x gap dominates real throughput.

This is why compression has an outsized impact. Going from 16-bit to 4-bit isn’t just 4x less storage; it’s 4x less memory traffic per token. Available RAM is also tighter than specs suggest (often under 4GB after OS overhead), limiting model size and architectural choices like mixture of experts (MoE).

Power matters too. Rapid battery drain or thermal throttling kills products. This pushes toward smaller, quantized models and bursty inference that finishes fast and returns to low power.

Small models have gotten better

Where 7B parameters once seemed minimum for coherent generation, sub-billion models now handle many practical tasks. The major labs have converged: Llama 3.2 (1B/3B), Gemma 3 (down to 270M), Phi-4 mini (3.8B), SmolLM2 (135M-1.7B), and Qwen2.5 (0.5B-1.5B) all target efficient on-device deployment. Below ~1B parameters, architecture matters more than size: deeper, thinner networks consistently outperform wide, shallow ones.

Training methodology and data quality drive capability at small scales. High-quality synthetic data, domain-targeted mixes, and distillation from larger teachers buy more than adding parameters. Reasoning isn’t purely a function of model size: distilled small models can outperform base models many times larger on math and reasoning benchmarks.

The practical toolkit

Quantization: Train in 16-bit, deploy at 4-bit. Post-training quantization (GPTQ, AWQ) preserves most quality with 4x memory reduction. The challenge is outlier activations; techniques like SmoothQuant and SpinQuant handle these by reshaping activation distributions before quantization. Going lower is possible: ParetoQ found that at 2 bits and below, models learn fundamentally different representations, not just compressed versions of higher-precision models.

KV cache management: For long context, KV cache can exceed model weights in memory. Compressing or selectively retaining cache entries often matters more than further weight quantization. Key approaches include preserving “attention sink” tokens, treating heads differently based on function, and compressing by semantic chunks.

Speculative decoding: A small draft model proposes multiple tokens; the target model verifies them in parallel. This breaks the one-token-at-a-time bottleneck, delivering 2-3x speedups. Diffusion-style parallel token refinement is an emerging alternative.

Pruning: Structured pruning (removing entire heads or layers) runs fast on standard mobile hardware. Unstructured pruning achieves higher sparsity but needs sparse matrix support.

Software stacks have matured

No more heroic custom builds. ExecuTorch handles mobile deployment with a 50KB footprint. llama.cpp covers CPU inference and prototyping. MLX optimizes for Apple Silicon. Pick based on your target; they all work.

Beyond text

The same techniques apply to vision-language and image generation models. Native multimodal architectures, which tokenize all modalities into a shared backbone, simplify deployment and let the same compression playbook work across modalities.

What’s next

MoE on edge remains hard: sparse activation helps compute but all experts still need loading, making memory movement the bottleneck. Test-time compute lets small models spend more inference budget on hard queries; Llama 3.2 1B with search strategies can outperform the 8B model. On-device personalization via local fine-tuning could deliver user-specific behavior without shipping private data off-device.

Bottom line

Phones didn’t become GPUs. The field learned to treat memory bandwidth, not compute, as the binding constraint, and to build smaller, smarter models designed for that reality from the start.

Read the full article here.

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Voyager SDK v1.5.3 is Live, and That Means Ultralytics YOLO26 Support https://www.edge-ai-vision.com/2026/01/voyager-sdk-v1-5-3-is-live-and-that-means-ultralytics-yolo26-support/ Tue, 27 Jan 2026 21:32:41 +0000 https://www.edge-ai-vision.com/?p=56648 Voyager v1.5.3 dropped, and Ultralytics YOLO26 support is the big headline here. If you’ve been following Ultralytics’ releases, you’ll know Ultralytics YOLO26 is specifically engineered for edge devices like Axelera’s Metis hardware. Why Ultralytics YOLO26 matters for your projects: The architecture is designed end-to-end, which means no more NMS (non-maximum suppression) post-processing. That translates to simpler deployment and […]

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Voyager v1.5.3 dropped, and Ultralytics YOLO26 support is the big headline here. If you’ve been following Ultralytics’ releases, you’ll know Ultralytics YOLO26 is specifically engineered for edge devices like Axelera’s Metis hardware.

Why Ultralytics YOLO26 matters for your projects:

The architecture is designed end-to-end, which means no more NMS (non-maximum suppression) post-processing. That translates to simpler deployment and genuinely faster inference. It talks about up to 43% speed improvements on CPUs compared to previous versions. For anyone running projects on Orange Pi, Raspberry Pi, or similar setups, that’s a nice boost.

Small object detection also gets a nice bump thanks to ProgLoss and STAL improvements. If you’re working on anything that needs to catch smaller details (maybe retail analytics, inspection systems, drone footage analysis), this should be super interesting.

Ultralytics YOLO26 comes in n/s/m/l flavours across all the usual tasks: detection, segmentation, pose estimation, oriented bounding boxes, and classification. Good options for the speed vs. accuracy tradeoff based on your hardware and use case.

Bug fixes and stability improvements:

Beyond Ultralytics YOLO26, this release cleans up several issues from v1.5.2. Resource leaks in GStreamer and AxInferenceNet pipelines are fixed, segmentation faults when recreating pipelines with trackers are sorted, and there’s better performance for cascaded pipelines with secondary models.

If you’ve got systems with multiple Metis devices, there’s also a deadlock fix for setups with more than eight of them.

Get it now:

Head over to the usual spots to grab v1.5.3. If you’re already running projects on earlier versions, the stability fixes alone make this a welcome update.

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Free Webinar Highlights Compelling Advantages of FPGAs https://www.edge-ai-vision.com/2026/01/free-webinar-highlights-compelling-advantages-of-fpgas/ Mon, 26 Jan 2026 22:36:11 +0000 https://www.edge-ai-vision.com/?p=56570 On March 17, 2026 at 9 am PT (noon ET), Efinix’s Mark Oliver, VP of Marketing and Business Development, will present the free hour webinar “Why your Next AI Accelerator Should Be an FPGA,” organized by the Edge AI and Vision Alliance. Here’s the description, from the event registration page: Edge AI system developers often […]

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On March 17, 2026 at 9 am PT (noon ET), Efinix’s Mark Oliver, VP of Marketing and Business Development, will present the free hour webinar “Why your Next AI Accelerator Should Be an FPGA,” organized by the Edge AI and Vision Alliance. Here’s the description, from the event registration page:

Edge AI system developers often assume that AI workloads require a GPU or NPU. But when cost, latency, complex I/O or tight power budgets dominate, FPGAs offer compelling advantages.

In this talk we’ll explore how FPGA serve not just a compute block, but as a system-integration and acceleration platform that can combine tailored sensor I/O, signal processing, pre/post-processing and neural inference on one device.

We’ll also show how to map AI models onto FPGAs without doing customer hardware design, using two two practical on-ramps—(1) a software-first flow that generates custom instructions callable from C, and (2) a turnkey CNN acceleration block.

Using representative embedded-vision workloads, we’ll show apples-to-apples benchmarks. Attendees will leave with a decision checklist and a concrete “first experiment” plan.

Mark Oliver is an industry veteran with extensive experience in engineering, applications, and marketing. A native of the UK, Mark gained a degree in Electrical and Electronic Engineering from the University of Leeds. During a ten year tenure with Hewlett Packard, he managed Engineering and Manufacturing functions in HP Divisions both in Europe and the US before heading up Product Marketing and Applications Engineering at a series of video related startups. Prior to joining Efinix, Mark was Director of Worldwide Storage Accounts at Marvell, heading up Marketing and Business Development activities.

To register for this free webinar, please see the event page. For more information, please email webinars@edge-ai-vision.com.

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